Goals

The objectives of the training Signal integrity :

At the end of this training course, trainees will be able to take into account design difficulties related to increased transmission speeds (losses, crosstalk, mode conversion, non-linearity, etc.) and understand the dynamic and frequency limitations of signals and their propagation, and use design tools to assist with board layout and routing, as well as wired transmissions.
• 29.09 au 02.10.2026 - Vélizy

The aim of this training course is to:


  • Identify the causes and effects of noise superimposed on signals

  • Master power noise and its decoupling (power integrity, ground bounce)

  • Be able to simulate line effects and model signal integrity (SI)

  • Identify the main pitfalls in electronic board design, including component selection and implementation

  • Be able to analyse the effects of filters (linear or otherwise) and calculate a surge protection circuit

Teaching methods

The training Signal integrity takes place :

In-person

Program

1/ Signal-to-noise ratio
Reminders and definitions
FFT and inverse FFT
Thermal and quantisation noise
Peak, average and median values
Amplitude probability density (APD)
Excess noise and 1/F – Choice of technology
SINAD and effective number of bits (ENOB)
Signal-to-noise ratio (SNR)
Relationships between THD, SNR and SINAD
Integral and differential non-linearity (INL, DNL)
Bit error rate (BER, BEP)


2/ Noise margin
Confusion between the concepts of earth, ground and 0 V
Static and dynamic noise margins
« Ground bounce: cause, measurement and effects
Front slopes, simultaneous switching
Jitter, case inductance, maximum throughput
Choice of layers and stacking stacking »
Thermal drift and non-linearity
Envelope detection: example


3/ Power supply noise (PI) Power converter noise Power bus impedance Current return - Layer change
Modelling a power supply by planes
Spectrum of current consumption and simulation
Cavity effect between planes, distance between vias
Power supply noise and induced ‘jitter’ induced jitter
Routing errors – Effects of slots
Structural resonances – Edge effect
“ Power integrity, PSRR and decoupling


4/ Line effects
Electromagnetism, permeability and permittivity
Current flow, propagation speed
Characteristic impedance / line parameters
Near and far fields - Propagation
Transition and delay time measurements
Simulation of skin effect and roughness
Inductance of finite and imperfect planes
The two types of resonance - Measurements in 50 Ω
Effects of line losses - Simulation
Dielectric losses and choice of dielectric
« HDI », high-density integration and microvias
Pre-emphasis, peaking, active equalisation
« TDR » Reflectometry: Measurements and simulation
« Overshoot », « Ringing », waveforms
Effects and risks of serpentine delay
Capacitor pads, vias and stub effect
Risk of double toggling - Adaptation
S parameters: definition and simulation
Embedding and de-embedding
OSM/OSTM calibration - Smith chart
Connectors for HF signals - Simulation
Fast clock routing
Distributed adaptation simulation


5/ Active components
Dual sources / data sheets
Crossover distortion and effects
References and voltage regulators
Amplifier output filtering
Schematic analysis and validation
SerDes (Serialiser/deserialiser)
QFP, BGA, ‘wire bond’, " flip chip »
RLC and SIP / LVDS drivers
High-density interconnections (HDI)
Metastability / Dual synchronisation
O’ diagramand histogram
Concept of mask – Error rate
Amplitude and phase modulation
OFDM modulation / Constellation
Jitter measurements, Jitter / analysis
Phase noise – Effect on ADC / DAC
Spectrum spreading clocks (SSC)


6/ Crosstalk and near fields
Capacitive and inductive crosstalk
Parasitic crosstalk / telediaphony / modelling
« Glitch » due to crosstalk: pull-in and push-out
Crosstalk between lines – load effects
« NEXT », « FEXT » and « Alien »
Crosstalk/attenuation ratio (ACR)
Connectors and near-field probes


7/ Differential links
Magnetic components and symmetrisation
Longitudinal conversion loss (LCL, TCL)
BER and common mode rejection (CMRR)
Connection asymmetries: layout routing
Skew effect and other asymmetries
Even Z, odd Z (Zodd and Zeven), routing
Microstrip or stripline / Radiated emission


8/ Protective components
Latch-up phenomenon
Absolute maximum values / risks
Power supply input protection
Clamping diodes (" clamping »)
Resistor overload resistance
F and t simulation of low-pass filters
Problems and choice of capacitor
Surge arresters - Choice of Transzorb
Linear or non-linear filters – Examples
Zt of shielded cable and reducing effect
Choice of shielded cable and connector

For who ?

- Design engineers and technicians
- Engineers and technicians specialising in the development of high-speed or high-performance circuits
- Designers and integrators of high-performance electronic systems
Prerequisites
- Basic level of physics for all senior technicians
- Basic level of mathematics for all senior technicians
- Previous experience in electronic design is desirable
Delivered documents
- Certificate of completion of training
Apave +
Programme can be adapted in terms of duration and content for in-house training

To register and find out more, please contact us at: mail@aemc.fr - +33 (0)4 76 49 76 76
Teacher profile
- Trainer and field consultant with over 10 years of experience

Training

Signal integrity

Ref : AEMC20
4 days - 28 hours
2440 € Excl. Tax
In-person

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